Low-Power 128-Channel Neural-Signal Processor with One-Time Programming Memory for High-Density Implantable Neural-Sensing Microsystems

Highly integrated & miniaturized neural sensing microsystems are crucial for brain function investigation for capturing high spatiotemporal resolution neural signals. In this paper, a lowpower neural-signal processor is proposed to extract and classify high-density neural features for an implantable neuralsensing microsystems. The proposed neural-signal processor is designed by ARM Cortex-M0, one-time programmable (OTP) memory with an integrated voltage regulation module (VRM), self-reset circuits and 8 configurable discrete wavelet transform processing elements (DWT PEs). The on-chip OTP memory and self-reset circuits conquer the critical design challenges of implantable neural sensing microsystems, such as small form factor and ease of the longevity. Additionally, the 8 DWT PEs are designed to extract 128-channel features by filtering the neural signal into different frequency bands. The 128-channel neural-signal processor is implemented using TSMC 40nm CMOS technology, and integrated to a heterogeneous wireless neural-sensing microsystem. The overall power consumption of the proposed high-density neural-signal processor is only 1.92mW for 128 channels.