Hardware Trojan Detection Using Controlled Circuit Aging

This paper reports a novel approach that uses transistor aging in an integrated circuit (IC) to detect hardware Trojans. When one reduces the supply voltage of a transistor from an initial higher voltage to a smaller voltage, it causes short term aging in the transistor. When stressing the transistor, the higher supply voltage produces a larger aging-induced threshold voltage. Transition of the supply voltage to a smaller value at this higher threshold voltage reduces the transistor current. This ends up in a longer switching delay through the transistor than what standalone voltage scaling causes. This increase in delay results in timing violations that reveal as timing errors at the output of the IC during its operation. We present experiments using aging-aware standard cell libraries to illustrate the usefulness of the technique in detecting hardware Trojans. Combining IC aging with over-clocking produces a pattern of bit errors at the IC output by the induced timing violations. We use machine learning to learn the bit error distribution at the output of a clean IC. We differentiate the divergence in the pattern of bit errors because of a Trojan in the IC from this baseline distribution. We simulate the golden IC and show robustness to IC-to-IC manufacturing variations. The approach is effective and can detect a Trojan even if we plant it far off the critical paths. Simulation results on benchmarks from the Trust-hub show a Trojan detection accuracy of over 99%.