Multiple-Vt Solutions in Nanosheet Technology for High Performance and Low Power Applications

R. Bao,K. Watanabe,J. Zhang,J. Guo,H. Zhou,A. Gaul,M. Sankarapandian, J. Li, A. R. Hubbard, R. V. Ega,S. Pancharatnam,P. Jamison,M. Wang,N. Loubet,V. Basker,D. Dechene,D. Guo,B. Haran,H. Bu,M. Khare

2019 IEEE International Electron Devices Meeting (IEDM)（2019）

引用 27|浏览121

关键词

sheet-to-sheet spacing,MGBC,metal gate boundary control,metal multiVt integration,device geometry constraint,low-power applications,high performance computing,NS technology,innovative integration scheme,critical dimension scaling,threshold voltage,Nanosheet device architecture,low power applications,Nanosheet technology

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