Accuracy-Aware Memory Allocation to Mitigate BRAM Errors for Voltage Underscaling on FPGA Overlay Accelerators.

FPGA(2020)

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摘要
Approximate computing (AC) aims to achieve energy-efficiency in digital systems by sacrificing the computational accuracy of an application. Memory-intensive applications, in which a large amount of data is processed to reach a meaningful conclusion, are the primary target. Systems for such applications consists of a large pool of compute-unit and sizeable on-chip memory. The total energy consumption for such applications is often dominated by the on-chip memory. We, therefore, focus on improving the energy efficiency of the on-chip memory by appropriately scaling down its supply voltage. In this paper, we propose a memory allocation technique for FPGA-based accelerators to improve accuracy and energy consumption for such memory-intensive applications. Unlike state-of-the-art, our technique focusses on the BRAM of the FPGA. Since an application consists of both critical and non-critical data and is required to treat them accordingly to maintain good computational accuracy, we thereby use LUTRAM of FPGA to realize the reliable memory, whereas BRAM operating at a lower voltage is considered as the unreliable one. First, we introduce a compiler pre-processor to annotate the arrays of an application as critical and non-critical ones. Afterward, we employ an exploration heuristic to select an optimal point of the reliable and unreliable memories for the application without incurring run-time as well as energy consumption based on pre-characterize memory power. Experimental results on various signal and image processing applications reveal that the proposed memory allocation heuristic improves the accuracy from 13.0% to 73.2% along with 0.77x energy savings while incurring 1.12x circuit area.
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