Reducing Energy of Approximate Feature Extraction in Heterogeneous Architectures for Sensor Inference via Energy-Aware Genetic Programming

IEEE Transactions on Circuits and Systems I-regular Papers(2020)

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摘要
Hardware acceleration substantially enhances both energy efficiency and performance, but raises major challenges for programmability. This is especially true in the domain of approximate computing, where energy-approximation tradeoffs at the hardware level are extremely difficult to encapsulate in interfaces to the software level. The programmability challenges have motivated co-design of accelerators with program-synthesis frameworks, where the structured computations resulting from synthesis are exploited towards hardware specialization. This paper proposes energy-aware code synthesis targeting heterogeneous architectures for approximate computing. A heterogeneous architecture for embedded sensor inference is employed, demonstrated in custom silicon, where programmable feature extraction is mapped to an accelerator via genetic programming. The high level of accelerator specialization and structured mapping of computations to the accelerator enable robust energy models, which are then employed in a genetic-programming algorithm to improve the energy-approximation Pareto frontier. The proposed algorithm is demonstrated in an electroencephalogram-based seizure-detection application and an electrocardiogram-based arrhythmia-detection application. At the same level of baseline inference performance, the energy consumption of genetic-programming models executed on the accelerator is 57.4% and 21.8% lower, respectively, with the proposed algorithm, compared to a conventional algorithm without incorporating energy models for execution on the accelerator.
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关键词
Approximate computing,energy efficiency,feature extraction,genetic programming,Pareto optimization
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