Design and Application of DDR3 SDRAM in LCoS Logic Control

A Liquid Crystal on Silicon (LCoS) display system with resolution of 1280 ×1024 is designed and driven by FPGA (Field-Programmable Gate Array). The system uses DDR3 SDRAM (Double Data Rate3 Synchronous Dynamic Random Access Memory), combining the DDR3 MIG core with read/write timing and FIFO (First-in First out) technology, and achieves a 180Hz field sequential driving display on LCoS.