Optimum pulse-width modulation strategy for a symmetric cascaded multilevel inverter

This paper investigates for the most suitable PWM strategy for a symmetric cascaded multilevel inverter. The objective is to determine a PWM switching strategy which optimises inverter performance by ensuring higher DC link utilisation and minimum total harmonic distortion (THD) at low switching frequency to minimise switching power losses. Simulations carried out in MATLAB-Simulink environment has given an insight of inverter performance when carrier-based PWM techniques are applied. In this parametric evaluation, both odd and even multiples of 50 Hz modulating signal were applied for obtaining switching frequency for various multicarrier-based PWM strategies.