Volcan: System Integration of HLS and HMC on FPGAs

High-Level Synthesis (HLS) is a process that translates traditional software languages (C/C++/Java) into either a hardware description language representation or a netlist representation that, ultimately, can be implemented on an FPGA device, for example. The original goal was to make advanced computing accelerators accessible to embedded computing systems programmers. However, the technology has attracted the interest of high-performance computing (HPC) programmers as well. This would be a huge benefit because labor statistics suggest that every year 10x as many software programmers graduate for every hardware designer [1]. However, HPC programmers use large in-core datasets versus the transient, streaming data sets that are common in embedded systems. Looking forward, it is appropriate to explore the behavior of HLS with next-generation memory technologies, like the Hybrid Memory Cube (HMC).