Calibrating Amplifiers Nonlinearity Using Comparator-Based ADCs

Amplifiers are widely used within analog-to-digital converters (ADCs) to buffer and increase signal amplitude, alleviating the accuracy, noise, and power constraints of the ADCs. However, any nonlinearity caused by front-end amplifiers is fully or partially inherited by the ADC, compromising its overall linearity. Additionally, as CMOS processes scale, amplifiers become increasingly difficult to design due to reduced intrinsic gain and voltage headroom. Many applications rely on digital calibration to alleviate the amplifier specifications, which may use polynomial fitting or another sort of digital processing. Despite reducing the analog power, these solutions render high complexity and power consumption on the digital part. In this brief, we describe how comparator-based ADCs, such as a flash ADC or a comparator-based asynchronous binary search (CABS) ADC, inherently provide sufficient degrees of freedom to calibrate any monotonic nonlinearity. Then, we exploit this property to propose a low-complexity, low-power, and low-overhead calibration scheme, where we embed the inverse transfer function of the nonlinear amplifier into the decision thresholds of the following ADC. We also propose a statistical-driven algorithm that is used to guide the thresholds adjustment in the background. Finally, we extensively validate the proposed approach through behavioral simulations.