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We proposed RNNPool, an efficient Recurrent Neural Networks-based non-linear pooling operator

RNNPool: Efficient Non-linear Pooling for RAM Constrained Inference

NIPS 2020, (2020): 20473-20484

Cited: 20|Views72
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Abstract

Pooling operators are key components in most Convolutional Neural Networks (CNNs) as they serve to downsample images, aggregate feature information, and increase receptive field. However, standard pooling operators reduce the feature size gradually to avoid significant loss in information via gross aggregation. Consequently, CNN archite...More
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Introduction
  • Pooling operators generate aggregate representations of features corresponding to a spatial region and are commonly used in CNNs to down-sample activation maps.
  • While MobileNetV2 (Sandler et al, 2018) and EfficientNet (Tan & Le, 2019) do not have explicit pooling layers, they use strided convolutions to down-sample the image, which can be viewed as a weighted average pooling.
  • Typical pooling operators use computationally efficient but gross aggregation methods like average or maximum of the inputs, which restricts their application to a small receptive field.
  • DenseNet121 uses 41 layers to reduce size of the image from 112×112 to 14×14.
Highlights
  • Pooling operators generate aggregate representations of features corresponding to a spatial region and are commonly used in Convolutional Neural Networks (CNNs) to down-sample activation maps
  • We present empirical evidence to demonstrate that RNNPool operator is compatible with popular CNN architectures for vision tasks, and can push the envelope of compute and memory usage vs accuracy curve
  • We show that RNNPool combined with a MobileNet style architecture generates accurate models for Visual Wake Words and face detection problems that can meet the compute and budget requirements of ARM Cortex M4 devices
  • We proposed RNNPool, an efficient Recurrent Neural Networks (RNNs)-based non-linear pooling operator
  • RNNPool operator was used to create RNNPoolLayer which is an effective alternative to the RAM intensive components in modern architectures
  • Extensive experimentation on Face Detection and Visual Wake Word problems shows that RNNPool based architectures can enable real-time solutions on resource-constrained tiny microcontrollers
Methods
  • Base Network Average Pooling Max Pooling Strided Convolution RNNPool Block Last layer RNNPool RNNPool Block + Last layer RNNPool improves from 2.29 MB to 0.24 MB (if re-computation is disallowed and memory optimization similar to (Chowdhery et al, 2019) is used) and the number of computations slightly improves from 300 MFLOPs to 226 MFLOPs, while the accuracy on ImageNet-10 is retained — 94.4% for the new model vs 94.2% for the base model
  • These results extend to other networks like EfficientNet, ResNet and GoogLeNet (Szegedy et al, 2015), where residual connection based functional blocks in the initial parts can be effectively replaced with the RNNPoolLayer with improvements in working memory and compute, while retaining comparable accuracy.
Results
  • Evaluation of RNNPool

    Vision Tasks

    the authors present empirical evidence to demonstrate that RNNPool operator is compatible with popular CNN architectures for vision tasks, and can push the envelope of compute and memory usage vs accuracy curve.
  • The authors show that RNNPool combined with a MobileNet style architecture generates accurate models for Visual Wake Words and face detection problems that can meet the compute and budget requirements of ARM Cortex M4 devices.
  • Hyperparameters: Models are trained in PyTorch (Paszke et al, 2019) using SGD with momentum optimizer (Sutskever et al, 2013) with weight decay 4 × 10−5 and momentum 0.9.
  • The authors do data-parallel training with 4 NVIDIA P40 GPUs and use a batch size of 256 for classification and 32 for face detection.
  • More details about hyperparameters can be found in the Appendix D.3
Conclusion
  • The authors proposed RNNPool, an efficient RNN-based non-linear pooling operator.
  • RNNPool operator was used to create RNNPoolLayer which is an effective alternative to the RAM intensive components in modern architectures.
  • Extensive experimentation on Face Detection and Visual Wake Word problems shows that RNNPool based architectures can enable real-time solutions on resource-constrained tiny microcontrollers.
  • Going forward, real-world deployment of RNNPool based solutions for wakeword and similar problems would be of great interest.
  • RNNPool can potentially be combined with more efficient computation graphs over the same architectures.
  • The authors leave further investigation into optimizing these specific computation graphs as a topic for future research
Tables
  • Table1: Rows 2-5) reinforces the same but on bigger image classification datasets. ImageNet-10 classification and Visual Wake Words tasks with few base layers replaced by different pooling strategies. Row 5 refers to RNNPool Block utilized as shown in Table 2 for MobileNetV2 and Figure 4 for DenseNet121. Average Pooling, Max Pooling and Strided Convolutions are used to replace the blocks in the base network at the same position as RNNPool was used in Row 5. Last layer RNNPool (Row 6) replaces the last Average Pooling layer in the models. The last row of the table refers to the replacement of blocks as in Row 5 along with the last Average Pooling layer in the base network with RNNPoolLayer
  • Table2: MobileNetV2-RNNPool: RNNPoolLayer(Rin = 112, Cin = 112, S = 4, r = 6, c = 6, k = 32, h1 = 16, h2 = 16) is used. The rest of the layers are defined as in MobileNetV2 (<a class="ref-link" id="cSandler_et+al_2018_a" href="#rSandler_et+al_2018_a">Sandler et al, 2018</a>). Each line denotes a sequence of layers, repeated n times. The first layer of each bottleneck sequence has stride s and rest use stride 1. Expansion factor t is multiplied to the input channels to change the width
  • Table3: The effect of replacing functional blocks in the baseline models with RNNPoolLayer for ImageNet-10 image classification. Memory Optimised calculations
  • Table4: Comparison of resources and accuracy for ImageNet-1K
  • Table5: Comparison of memory requirement, # parameters and validation MAP obtained by different methods for Face Detection on the WIDER FACE dataset. RNNPool-Face-C is able to achieve higher accuracy than the baselines despite using 3× less RAM and 4.5× less FLOPs. RNNPool-Face-Quant enables deployment on Cortex M4 class devices with 6-7% accuracy gains over the cheapest baselines
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Related work
  • Pooling: Max-pooling, Average-pooling and strided convolution layers (LeCun et al, 2015) are standard techniques for feature aggregation and for reducing spatial resolution in DNNs. Existing literature on rethinking pooling (Zhao et al, 2018; He et al, 2015; Gong et al, 2014) focuses mainly on increasing accuracy. But it does not take compute/memory efficiency into consideration which is one of the primary focus of this paper and the RNNPool operator.

    Efficient CNN architectures: Most existing research on design of efficient CNN models aims at reducing inference cost (FLOPs) and model size. The methods include designing new model architectures such as DenseNet (Huang et al, 2017), MobileNets (Howard et al, 2017; Sandler et al, 2018) or searching for them (e.g. ProxylessNAS (Cai et al, 2018), EfficientNets (Tan & Le, 2019)). The aforementioned models do not optimize the peak working memory (RAM) of the model, which can be a critical constraint on tiny devices like microcontrollers. Previous work on memory (RAM) optimized inference manipulates existing convolution operator by reordering computations (Cho & Brand, 2017; Lai et al, 2018) or performing them in-place (Gural & Murmann, 2019) to save storage. However, most of these methods provide relatively small memory savings and typically apply to small images like in CIFAR-10 (Krizhevsky et al, 2009). In contrast, RNNPool reduces memory requirement significantly while maintaining accuracy on various real-world vision tasks and benchmarks.
Funding
  • In Section 5.2, we show that an RNNPool based MobileNetV2 architecture can enable solutions with comparable accuracy to the prior art but in about 8× less RAM and 40% lower compute cost (FLOPs)
  • We propose an RNNPool based architecture that can potentially be deployed on Cortex M4 class devices while still ensuring 5-10% higher accuracy than EagleEye
  • We can increase the accuracy of the base model by more than 1% when replacing the last average pool layer with a RNNPool Block
  • 0.07M 0.12G 0.80 0.78 0.53 0.84 0.83 0.81 the lowest resolution image is about 40 KB, while our model requires only 34 KB RAM despite using the highest resolution image and ensuring ≈ 4% higher accuracy
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  • 4. Inception block: The peak RAM usage for this has been explained in detail in Section 5. Since no inception layer is strided, we do not need separate case like in residual block.
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