A 34-fJ/bit 20-Gb/s 1/8-rate Charge-Steering DFE for IoT Applications

2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)(2019)

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摘要
The need for receiver equalization in wireline communication systems has increased with the large increase in data rates. There are two main categories for equalizers; continuous-time linear equalizers and non-linear equalizers implemented as decision feedback equalizers (DFE). Most DFEs use half-rate or quarter-rate architectures. The DFE proposed in this paper, however, uses a 1/8-rate architecture to relax the timing constraints and reduce power consumption. This paper presents the design of a 1-tap 20-Gb/s charge-steering 1/8-rate DFE in a 65-nm CMOS technology. The proposed DFE consumes 0.68-mW from a 1-V supply and compensates for 7-dB channel loss at Nyquist when processing 20-Gb/s data.
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关键词
decision feedback equalizer,high-speed I/O,receiver,serial-links,charge-steering
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