Global Optimization Of Reconfigurable Switched Capacitor Dc-Dc Converters

A methodology for the optimal switch sizing in reconfigurable switches capacitor converters (SCCs) is presented. The proposed procedure minimizes the sum of the power losses of all the topologies the SCC can operate in, hence achieving a global performance optimization. A design example is discussed: the proposed procedure allows to reduce the occupied silicon area by 23% for a target converter efficiency, or improve the efficiency up to 8% if the design is area-constrained.