Switching behavior method to estimate the intrinsic gate resistance of a transistor by using the gate plateau voltage

IEEE Energy Conversion Congress and Exposition(2019)

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摘要
This paper proposes a method for estimating the resistance of the gate part of a transistor chip, i.e., intrinsic gate resistance (R g,in ). The gate-source voltage (V gs ) transient waveforms generally exhibit a so-called plateau region at the transistor's turning-off. At this region, V gs at the gate electrode (V p ) and the current flowing through R g ,in and R g,ext (I g ) are constant, where R g,ext represents the resistance of the gate driving line out of the transistor. Thus, V gs = V p × {R g,ext /(R g,in + R g,ext )}(*) because I g = V p / (R g,in + R g,ext ) and V gs = V p - I g × R g,in . If V gs is measured at the turning-off with various R g,ext , fitting a line to the data allows Vp and Rg,in to be obtained from the intercept and the slope of the reciprocal version of (*), respectively,, i.e., 1/V gs = (R g,in /V p )×(1/R g,ext ) + 1/V p . This method is used to estimate the R g,in of a trench-gate SiC transistor. The obtained value is different from that provided in the transistor's data sheet; however, the device model with the new R g,in significantly improves the switching behavior simulation.
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关键词
SiC,MOSFET,intrinsic gate resistance,measurement,switching behavior
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