A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology

IEEE Journal of Solid-State Circuits(2020)

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摘要
A 1.33-Tb 4-bit/cell quadruple-level (QLC) 3-D flash memory in a 96-word-line (WL)-layer technology that achieves 8.5 Gb/mm 2 has been developed. This is the biggest capacity and the highest bit density ever reported. A source-bias-negative-sense with CLK-control allows deep negative $V_{\text {th}}$ sensing while maintaining low supply voltage. A new two-step (8–16) programming method and VDD generator enhancement realized a narrow $V_{\text {th}}$ for QLC with 18% tProg improvement. Page/state-dependent word-line (WL) overdrive shortens the WL transient time by 8%. An independent plane read enables reading from different WL address from each plane in multi-plane operation. Besides, mixing selection of QLC pages (lower/middle/upper/top) in one plane and triple-level cell (TLC) pages (lower/middle/upper) or single-level cell (SLC) page in the other is also supported to provide flexibility for system implementation.
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关键词
Programming,Generators,Couplings,Bit error rate,Reliability,Flash memories,Intellectual property
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