Efficient Hardware Implementation of Switching Median Filter for extraction of Extremely High Impulse Noise Corrupted Images

Images acquired by any imaging system suffers from arbitrary variation in the intensity values, abrupt changes in the illumination and low contrast. Such images lack utilizable information and suffers from visual interpretability. Subsidiary information from such images are extracted by removing the noise, sharpening contrast and detection of the edges by using several filtering techniques. Median filtering is one such non linear based method which removes range isolated noise like salt and pepper noise while preserving the edge information. But median filtering fails when the image is corrupted by extremely high impulse noise. Switching based median filtering is able to perform the noise removal in the case of high intensity impulse noise. This brief introduces an efficient parallel architecture for implementation of switching based median filtering technique using Field Programmable Gate Array (FPGA) prototyping. The results are analysed based on the hardware requirement, power consumption, and speed of the architecture. The FPGA result is validated by implementing the above algorithm in MATLAB when the images are corrupted by noise models.