Lightweight Efficient Simeck32/64 Crypto-Core Designs and Implementations, for IoT Security

IoT is a rapidly expanding environment. More and more devices, from the most high-end smartphones, to the most modest environmental sensors, already exhibit or acquire the ability to communicate with each other and be parts of networks. Connectivity is mainly accomplished through wireless communications and privacy is the way to go, regarding security over the air. A common approach dictates the incorporation of a crypto-core inside the transceiver. However, a privacy implementation must take into account several restrictions, imposed by the constrained resources of a small, power efficient device. For this purpose, an incorporation of a hardware implemented lightweight Simeck32/64 block cipher for IEEE 802.15.4 transceiver was proposed. In this work, we examine the FPGA implementation cost of such an approach, and we propose newly designed and efficient implementations of the proposed Simeck32/64 Crypto-Core. Our implementations achieve great improvement in throughput values, with a reasonable increase in hardware area. Furthermore, modifications of these approaches, exploiting the special functional blocks of a Xilinx FPGA, namely BRAM and DSP blocks, are implemented and the achieved results are evaluated. Additionally, the effects of applying the DSP multi-pumping methodology on the aforementioned implementations are also examined.