22FDX^® fMAX Optimization through Parasitics Reduction and GM Boost

Zhixing Zhao,Steffen Lehmann,Luca Lucci,Yogadissen Andee,Alexis Divay,Luca Pirro,Tom Herrmann,Alban Zaka,Ricardo Sousa,Patrick James Artz,Klaus Hempel,Juergen Faul,Tianbing Chen,Richard Taylor,Jerome Mazurier,Carsten Grass,Jan Hoentschel,David Harame

ESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC)（2019）

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摘要

This paper proposes three methods of reducing device gate resistance and parasitic capacitance while boosting transconductance of MOSFET on 22FDX ^® . The f MAX can be improved by 50% and up to 75% for NFET and PFET with respect to a standard 2.0µm finger width layout, respectively.

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关键词

RF,FDSOI,FMAX,FT,GATE RESISTANCE REDUCTION,PARASITIC CAPACITANCE REDUCTION

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22FDX® fMAX Optimization through Parasitics Reduction and GM Boost

22FDX^® fMAX Optimization through Parasitics Reduction and GM Boost