Energy Efficient Temporal Spatial Information Processing Circuits Based on STDP and Spike Iteration

In this brief, we propose a novel energy-efficient temporal-spatial information processing circuit that serves as the signal pre-processing interface for spiking neural networks. In order to transform sensory information into a highly efficient neural-like spike train, an iteration encoding scheme based temporal-spatial inter-spike interval (ISI) encoder is designed and analyzed. Moreover, a decoder is designed with the spike-timing-dependent plasticity (STDP) principle, which performs well in information recovery. The prototype of the proposed ISI encoder is presented, with a 3-interval encoder through the standard 180nm CMOS technology. The proposed ISI encoder could operate in $1{MHz}$ sampling frequency, and it occupies merely $0.647{m}{m}^{2}$ die area while consuming as low as $1.63{uW}$ /neuron power. A multi-level ISI decoder with spike width adaptation is also designed and evaluated through the CIFAR10 image dataset.