Design of a Multilayer PCB Bus for Medium Voltage DC Converters
2019 IEEE Electric Ship Technologies Symposium (ESTS)(2019)
摘要
In this work, the design of a planar PCB-based power bus for operation at 6 kV is presented. A previous reported bus which reduced electromagnetic interference (EMI) was redesigned to allow use of Wolfspeed's 10 kV XHV-6 and XHV-9 modules. A design method to control the peak electric field (E-field) in high field strength regions was then used to ensure the field strength in air and the PCB dielectric remain within an acceptable range. Using this method, adding a 1mm negative offset between the +/- DC power plane and MID conductor provided a 13% reduction in field strength alone with no other changes. Other optimization steps were taken to further reduce peak fields. The field strength in air was most efficiently controlled adding and external core to what would typically be the outermost layers of the PCB.
更多查看译文
关键词
PCB bus,low inductance,electric field control,partial discharge,power density,insulation,medium voltage DC (MVDC),power electronics building block (PEBB)
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络