A Novel RRAM Based Watermark Technique Utilizing the Impact of Forming Conditions on Reset Distribution

Watermark is a very important technique for information security. In this work, a RRAM-based electronic watermark technique leveraging the impact of Forming conditions on Reset distribution is experimentally demonstrated. The Forming process is indispensable for almost all RRAM device. The Forming conditions can affect the shape and size of the conductance filament, and further affects the resistance distribution at Reset. The tested data shows that the stronger Forming condition can get smaller mean value of resistance, and the use of RRAM as memory is not affected. In this design, two different Forming conditions are used to write watermark data `0' and `1'. A resistance in parallel technique is applied to enhance reliability. The experimental results show that the bit error rate (BER) reduced from ~30% to ~7% after using the optimized method. And no reliability degradation occurs after 200 normal Reset/Set cycles.