Identification of Synthesis Approaches for IP/IC Piracy of Reversible Circuits

ACM Journal on Emerging Technologies in Computing Systems (JETC)(2019)

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摘要
Reversible circuits employ a computational paradigm that is beneficial for several applications, including the design of encoding and decoding devices, low-power design, and emerging applications in quantum computation. However, similarly to conventional logic, reversible circuits are expected to be subject to Intellectual Property/Integrated Circuit piracy. To counteract such attacks, an understanding of how to identify the target function from a reversible circuit is a crucial first step. In contrast to conventional logic, the target function is (implicitly or explicitly) embedded into the reversible circuit. Numerous synthesis approaches have been proposed for this embedding task. To recover the target function embedded in a reversible circuit, one needs to know what synthesis approach has been used to embed the circuit. We propose a machine-learning-based scheme to determine the used reversible synthesis approach based on the telltale signs it leaves in the synthesized reversible circuit. We study the impact of optimizing the synthesis approaches on the telltale signs that they leave. Our analysis shows that the synthesis approaches can be determined in the vast majority of cases even if optimized versions of the synthesis approaches are used.
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关键词
BDD, ESOP, IP/IC piracy, QMDD, Reversible logic, TBS, machine-learning-based scheme, security
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