Technological Benchmark of Analog Synaptic Devices for Neuro-Inspired Architectures

Editor’s note: In this article, the authors present a circuit-level macro model (“NeuroSim” simulator) to estimate circuit-level performance of neuroinspired architectures to facilitate design space exploration. The model is used to analyze the impact of analog synapse device characteristics on the performance of a two-layer multi-layer perceptron (MLP) neural network and identify critical device properties (on/off ratio and asymmetry, in this case) to guide technology development.—An Chen, Semiconductor Research Corporation