1μm Pitch direct hybrid bonding with <300nm wafer-to-wafer overlay accuracy
2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)(2017)
摘要
Copper/oxide hybrid bonding process has been extensively studied these past years as a key enabler for 3D high density application with top and bottom tier interconnection pitch below 10μm. Since 2015 hybrid bonding process robustness has been confirmed on complete electrical test vehicles [1,2] as well as commercial products [3] integrating copper to copper interconnection pitchs close to 6μm. To our knowledge, no results have been shown today demonstrating sub-1.5μm pitch copper hybrid bonding feasibility.
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关键词
wafer-to-wafer overlay accuracy,copper/oxide hybrid bonding process,3D high density application,tier interconnection pitch,copper interconnection pitchs,electrical test vehicles,Pitch direct hybrid bonding,pitch copper hybrid bonding
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