Towards 500°C SPER activated devices for 3D sequential integration

J. Micout,B. Sklenard,P. Batude,R. Berthelon,Q. Rafhay,J. Lacord,B. Mathieu,L. Pasini,Z. Saghi,V. Delaye,L. Brunet,C. Fenouillet-Beranger,S. Joblot,F. Mazen,V. Mazzocchi,J-P. Colinge,G. Ghibaudo,M. Vinet

2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)（2017）

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摘要

This work investigates the possibility to reduce the Solid Phase Epitaxy Regrowth (SPER) temperature for dopant activation needed in 3D sequential integration. The electrical results obtained on 28nm FDSOI devices show that 500°C SPER can yield similar performance to that of 600°C SPER and 1050°C spike anneal. This paper highlights the advantages of using a <;100>-oriented channel and tilted implantation to successfully reduce the SPER thermal budget. It also confirms that the channel can be used as a seed for the recrystallization. The analysis takes into account the SPER rate dependence on temperature, crystalline orientation, dopant type and dopant concentration.

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关键词

SPER thermal budget,3D sequential integration,Solid Phase Epitaxy Regrowth temperature,dopant activation,FDSOI devices,spike anneal,SPER rate dependence,crystalline orientation,dopant concentration,temperature 600.0 degC,temperature 1050.0 degC,size 28.0 nm,temperature 500.0 degC

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