Time-shifted excess loop delay compensation DAC for 2-T s delay in CT-ΔΣ ADCs

This Letter proposes a new two-sample excess loop delay compensation in continuous-time delta-sigma modulators using time-shifted differentiated digital-to-analogue converter (DAC). This is done by using the information inherently available but ignored in the conventional methods, and therefore no additional hardware is required. Simulation results and mathematical analysis are provided to verify ...