Source-Underlapped GaSb–InAs TFETs With Applications to Gain Cell Embedded DRAMs

In this paper, a detailed evaluation of sub-10-nm n-/p-type GaSb-InAs double-gate tunneling FETs (TFETs) is presented. Source underlapping is shown to achieve lower subthreshold swing (SS) in both nand p-type GaSb-InAs TFETs and is verified with the analytical treatment. The impact of parameter variations on the performance of underlapped TFETs is investigated through atomistic, 2-D ballistic simu...