A 10-Gs/S 8-Bit 4-Way Interleaved Folding Adc In 0.18 Mu M Sige-Bicmos

In this paper, a time-interleaved 10-GS/s 8-bit analog-to-digital converter (ADC) fabricated in 0.18 mu m SiGe BiCMOS technology has been demonstrated. A 4 x 4 input multiplexer with good isolation and wide input bandwidth is proposed, which enables the ADC to support 1/2/4-channel sampling modes. In the track-and-hold (THA) stage, a switched emitter follower (SEF) topology with delayed dummy clock is introduced to minimize the overshoot effect of the SEF output. The ADC achieves spurious free dynamic range (SFDR) > 52 dBc and effective number of bits (ENOB) > 6.8 in low input frequencies. The analog input bandwidth is 5.6 GHz.