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A 0.1-pJ/b and ACF <0.04 Multiple-Valued PUF for Chip Identification Using Bit-Line Sharing Strategy in 65-nm CMOS
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, no. 5 (2019): 1043-1052
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Abstract
Emerging physical unclonable function (PUF) circuit designs in the IC supply chain pose not only a challenge to security threats but also a serious concern about hardware efficiency. The existing conventional PUF methods extract intrinsic random physical variation to generate two-valued secret key bits, which lack logical complexity and h...More
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