Quantum dot location relevance into SET-FET circuits based on FinFET devices.

Hybrid SET-FET circuits are candidates to extend the SET usefulness for low power circuits and with high integration density. The location of quantum dot (QD) of the SET is usually expected at the centre of the tunneling barrier, but out this ideality the QD may not be precisely located. For this, to analyse the impact of the QD location variation will be of high interest to predict the hybrid circuit behaviour.