Securing Hardware Accelerators: A New Challenge for High-Level Synthesis

Embedded Systems Letters, Volume 10, Issue 3, 2018, Pages 77-80.

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Abstract:

High-level synthesis (HLS) tools have made significant progress in the past few years, improving the design productivity for hardware accelerators and becoming mainstream in industry to create specialized system-on-chip architectures. Increasing the level of security of these heterogeneous architectures is becoming critical. However, stat...More

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