Experimental characterisation of coaxial TSV transistor keep out zones

Micro & Nano Letters(2018)

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摘要
Three-dimensional (3D) integration is an emerging technology that aims to achieve efficient packaging of the multifunctional silicon (Si) die within a single chip package. This system in package approach achieves connectivity between the individual Si die using through Si via (TSV) technology. Coaxial TSVs have emerged as the preferred 3D interconnect for high-frequency packaging applications due ...
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关键词
elemental semiconductors,integrated circuit design,integrated circuit interconnections,silicon,system-in-package,three-dimensional integrated circuits
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