A Reconfigurable Architecture Using a Flexible LO Modulator to Unify High-Sensitivity Signal Reception and Compressed-Sampling Wideband Signal Detection.

The direct RF-to-information converter unifies high-sensitivity signal reception and compressed-sampling (CS) wideband signal detection into a rapidly reconfigurable and easily scalable architecture occupying 0.56 mm2 in 65-nm CMOS. In reception mode, the DRF2IC RF frontend consumes 46.5 mW from 1.15 V and delivers 40-MHz RF bandwidth, 41.5-dB conversion gain, 3.6-dB noise figure, and -2 dBm B1dB....