IBM POWER9 memory architectures for optimized systems.

William J. Starke,J. S. Dodson,Jeffrey Stuecheli,Eric Retter,Brad W. Michael, Stephen J. Powell, James A. Marcella

IBM Journal of Research and Development（2018）

引用 6|浏览93

暂无评分

摘要

The IBM POWER9 processor chipset provides a variety of system memory architecture interfaces to enable highly differentiated system offerings: a high bandwidth, high capacity, highly reliable, buffered architecture; a compute-density-optimized direct DDR attach architecture; heterogeneous integration of graphics processing unit memory into the host system memory; and an agnostic, flexibly attached...

查看译文

关键词

Microprocessors,Memory architecture,Graphics processing units,Physical design,Chip scale packaging

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要