High-Speed Oversampled Continuous-Time Analog-to-Digital Converters

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)(2017)

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摘要
Oversampled continuous-time analog-to-digital converters are on the verge of surpassing the bandwidth of their discrete-time counterparts as their sampling rates continue to increase while recent innovative architectures have reduced their oversampling ratios. This paper outlines several architectures that have led to these improvements, which include single-loop Delta Sigma modulators, cascaded or MASH Delta Sigma modulators, and pipeline data converters.
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关键词
analog-to-digital converters,sampling rates,recent innovative architectures,oversampling ratios,pipeline data converters,high-speed ADC,oversampled ADC,continuous-time analog-to-digital converters,cascaded delta-sigma modulator,single loop delta-sigma modulator,pipeline data converter,MASH delta-sigma modulator
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