Key process steps for high performance and reliable 3D Sequential Integration

2017 Symposium on VLSI Technology(2017)

引用 12|浏览65
暂无评分
摘要
This work provides breakthroughs in key technological modules for high performance and reliable 3D Sequential Integration with intermediate BEOL (iBEOL) in-between tiers. We demonstrate that (i) a high-quality solid phase epitaxy process is possible at 500°C, (ii) TiN native oxide removal prior to poly deposition leads to an improvement in gate stack reliability below 525°C and (iii) state-of-the-art SiOCH ULK in iBEOL is reliable up to 550°C 5h with W metal lines. A process integration is thus proposed to match the process windows of bottom layers (bottom FET and iBEOL) stability and top devices performance and reliability, opening perspectives for a wide range of applications and technologies using 3D Sequential Integration.
更多
查看译文
关键词
3D sequential integration,low thermal budget process flow,gate stack reliability,iBEOL ULK reliability
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要