Unified systolic array architecture for finite field multiplication and inversion.

Computers & Electrical Engineering(2017)

引用 19|浏览5
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摘要
•Propose a regular technique for exploring the unified hardware structure.•Develop a novel unified systolic array structure for the multiplication and inversion algorithms over GF (2m).•Provide ASIC and FPGA implementations for the proposed and the previously published designs.
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关键词
Finite field inversion,Cryptosystems,Systolic arrays,Hardware security,Resource-constrained applications,ASIC
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