A low error add and shift-based efficient implementation of base-2 logarithm

A real-time and area-efficient hardware implementation of base-2 logarithm (log 2 ) finds many applications. In this paper, we analyze previous shift and add-based approximations of logarithm. Based on the analysis we present a new two region add and shift-based method to approximate log 2 in hardware. The proposed approach results in 81.55% less percentage error and 42.85% less average error compared to previously reported best two region based approximation approaches with comparable area cost and latency. The proposed method uses most significant four bits of fractional part of shift and add-based method with different weights to approximate fractional part of log 2 . Weights to these bits are assigned by simple addition, logical OR and logical AND operation to make hardware implementation more efficient.