A fully-digital and fully synthetizable TDC for high energy physics experiments

Trigger and data acquisition systems (TDAQ) of High Energy Physics (HEP) experiments intensively use time measurements for calibration of signals and synchronization between their different elements. Typically, electronics systems for time measurement are designed using a classical mixed-signal approach, while all-digital architectures are nowadays being explored and studied by state-of-art research. Indeed, although an optimized mixed-signal design reaches better performances, it requires a significant amount of design time w.r.t. a fully-digital design. Moreover, an analog IP blocks cannot be easily ported into a new technology, if compared with full digital IPs. In this work, we present a fully-digital TDC application, which is based on a fully synthesizable DCO. The TDC measures the phase relationship between a 40 MHz reference clock and a timing signal under measurement. The DCO design is independent from the technology and it can be described by using a high level Hardware Description Language; moreover, due to its specific characteristics, it can be synthesized, placed and routed by using automatic tools. In this work, we present the architecture of the DCO and of the TDC, their performances and the results on a preliminary implementation on a 130 nm ASIC prototype. The TDC is planned to be used in the upgrade of the Muon detector readout electronic in LHCb experiment at CERN. The TDC presented in this paper has the task of measuring the phase difference between the 40 MHz LHC machine clock and a digital signal coming from the muon detector. One of the main constraints of the TDC is on the phase difference resolution, which has to be about 1.5 ns, in order to cope with to the required resolution of the experiment.