Scalable Defect Tolerance Beyond the SIA Roadmap

As feature sizes approach the single-digit nanometer domain, manufacturing defects will become much more commonplace. Each computing fabric will have multiple defects, and physical and economic limits will make it impossible to eliminate them all. This will be true whether manufacturing is done using futuregeneration CMOS processes, or technologies such as Chemically Assembled Electronic Nanotechnology (CAEN). We will therefore have to find a way to use these fabrics inspite of the defects.