A Circuit for Low-Complexity Timing Synchronization in OFDM Systems

IEEE Transactions on Circuits and Systems Ii-express Briefs(2019)

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摘要
A novel low-complexity circuit for timing synchronization in orthogonal frequency division multiplexing systems is proposed. Like the conventional symmetric correlator originally presented by Park et al. , the proposed technique exploits mirrored conjugate symmetry in a preamble symbol. The proposed estimator uses a timing metric which incorporates the magnitude difference between pairs of incoming samples rather than the product of pairs of samples, as in the case of the conventional symmetric correlator. The hardware implementation complexity of the proposed technique is therefore vastly reduced. The magnitude of this reduction scales with the number of subcarriers, meaning that the circuit is of increasing value in modern wideband communications systems. Results indicate that the performance of the proposed circuit is very close to that of the widely used symmetric correlator in all but very low SNR environments.
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关键词
Timing,OFDM,Correlation,Estimation,Correlators,Receivers
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