Systematic Analysis Of Esd-Induced Soft-Failures As A Function Of Operating Conditions

Electrostatic discharges (ESD) to parts of a system can lead to system-level soft-failures. These failures can depend on the activity of the system at the moment of discharge. This paper investigates ESD susceptibility as a function of different operating conditions such as software loading, clock frequency, and VDD voltage. Due to the large number of possible conditions, a commercial automated ESD scanner is modified and used to obtain ESD susceptibility maps for each operating condition. The core processor of a single-board computer is selected as the device under test. It is observed that the processor becomes more sensitive to ESD events as its software loading increases. The effect of VDD voltage and clock frequency on the sensitivity of the processor is also discussed. Moreover, the effect of increasing the power distribution network impedance and noise is investigated, partially leading to counterintuitive results.