Optimizing Programming Energy For Improved Rram Reliability For High Endurance Applications

In this paper, we investigate RRAM endurance improvement by optimizing programming energy on HfO2/Ti-OXRAM 1T1R kb arrays. SET and RESET programming patterns are optimized with programming current of 50 mu A, to minimize the energy provided to the system, maintaining sufficient widow margin on resistance distribution tails. Impact of both SET and RESET pattern on window margin is addressed. Programming scheme based on optimized ramp voltage patterns allows to improve maximum endurance of about 2 decades, to insure stable median window margin at 10(7) cycles and to maintain window margin at 2 sigma after 10(6) cycles at 50 mu A.