Nanoscale Patterning Of Electronic Devices At The Amorphous Laalo3/Srtio3 Oxide Interface Using An Electron Sensitive Polymer Mask

A simple approach is presented for designing complex oxide mesoscopic electronic devices based on the conducting interfaces of room temperature grown LaAlO3/SrTiO3 heterostructures. The technique is based entirely on methods known from conventional semiconductor processing technology, and we demonstrate a lateral resolution of similar to 100 nm. We study the low temperature transport properties of nanoscale wires and demonstrate the feasibility of the technique for defining in-plane gates allowing local control of the electrostatic environment in mesoscopic devices. (C) 2018 Author(s).