An Empirical Model for Predicting SE Cross Section for Combinational Logic Circuits in Advanced Technologies
IEEE Transactions on Nuclear Science(2018)
摘要
At the gigahertz range of frequencies, contribution of combinational logic upsets has increased significantly to the overall single-event (SE) upset rate (SER) of sequential circuits. Most approaches for modeling and/or predicting logic SER are either pure simulation based or pure experiment based. Simulation-based approaches need a lot of computing power. Experiment-based approaches require fabri...
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关键词
Logic gates,Integrated circuit modeling,Combinational circuits,Fabrication,Single event upsets
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