Power and Technology Scaling into the 5 nm Node with Stacked Nanosheets

Terence Hook has been with IBM since 1980, after receiving his ScB from Brown University. He earned his PhD in Electrical Engineering from Yale University in 1986. While at IBM, he has worked on technology integration and device design for bipolar, BiCMOS, and CMOS technologies from 2 μm to 5 nm and beyond. He has authored dozens of conference and journal papers and holds more than 100 patents. He is currently with IBM Research in Albany, NY.