The TRAMOS pixel as a photo-detection device: Design, architecture and building blocks

The deep trapping gate device concept for charged particle detection was recently introduced in Saclay/IRFU. It is based on an n-MOS structure in which a buried gate, located below the n-channel, collects carriers which are generated by ionizing particles. They deposit their energy in a volume which extends in the bulk, below the buried gate. The n-channel device is based on holes in-buried gate localization. Source–drain current modulation occurs, measurable during readout. The buried gate (Deep Trapping Gate or DTG) contains deep level centers which can be introduced during process or may be made with a Quantum Well. The device can be scaled down providing a micron range resolution. The proof of principle for such a device was verified using 2D device and process simulations. Work under way focusses on the study of building blocks. In this contribution, the pixel proof of design, using existing fabrication techniques will be discussed first. The use of this pixel for photon imaging will be discussed.