0.96-To-5.1ghz 4-Element Spatially Analog Iir-Enhanced Delay-And-Sum Beamformer

A 0.96-to-5.1GHz 4-element antenna array is described. The beamformer is designed in 0.13-mu m CMOS using a delay-and-sum (DAS) architecture enhanced with a spatially analog IIR filter for sidelobe reduction. The DAS portion is based on a novel delay element that provides 82-ps delay range and consumes 6.15 mW of power. The beamformer circuit is measured to achieve sidelobe levels of -22 dBc, which is a 10-dB improvement over prior art.