Explicit layout pattern density controlling based on transistor-array-style
international midwest symposium on circuits and systems, pp. 1557-1560, 2017.
An aggressive controlling for layout pattern density is becoming essential for the manufacturability of advanced processes. Focusing on analog layout under severe density constraints, this paper provides a novel idea that layout generation and verification are co-working on a density-aware format. Our idea follows a transistor-array(TA)-s...More
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