High performance and low leakage current InGaAs-on-silicon FinFETs with 20 nm gate length

2017 Symposium on VLSI Technology(2017)

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摘要
We report the fabrication of short-channel FinFETs on InGaAs-on-silicon wafers using the aspect ratio trapping (ART) technique. We demonstrate excellent short-channel control down to 20 nm gate length due to scaled fin width down to 9 nm and reduction of parasitic bipolar effect (PBE). PBE that plagues III-V NFETs with gate-all-around (GAA) or III-V-on-insulator (III-V-OI) structures can be significantly suppressed by optimized ART FinFET technology. We demonstrate record high on-current ION and low drain leakage current for short gate lengths in the 20–32 nm range for InGaAs-on-silicon NFETs.
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关键词
InGaAs-on-silicon NFET,low drain leakage current,optimized ART FinFET technology,III-V-OI structures,III-V-on-insulator structures,GAA,gate-all-around,III-V NFET,parasitic bipolar effect,short-channel control,aspect ratio trapping technique,InGaAs-on-silicon wafers,short-channel FinFET,InGaAs-on-silicon FinFET,low leakage current FinFET,high performance FinFET,size 20 nm to 32 nm,InGaAs-Si
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