Numerical Investigation of High-Voltage Partial Buried P/N-Layer SOI LDMOS

High-voltage lateral double-diffused MOSFETs with partial buried P/N-type silicon layers (PBPL/PBNL) in silicon-on-insulator(SOI) technology are investigated numerically. In the lateral direction, the partial buried silicon layer (PBL) can introduce an additional electric field peak, which improves the surface electric field distribution and increases the charge accommodation in the drift region. ...